Smip/Ssip limited by fixed 6-register scope

[reosdev]

The entire Smip/Ssip extension benefit is limited by the fixed 6-register scope (x10-x15)

Context	Registers	Hardware saved	Software saved
GP caller-saved	x1, x5-x7, x10-x17, x28-x31	6 (x10-x15)	10
GP callee-saved	x8-x9, x18-x27	0	12
Floating point	f0-f31	0	32
Vector (RVV)	v0-v31 + vtype, vl	0	32+

Hardware saves 6 out of potentially 80+ registers which is less than 8% of full context. Does this little saving cover the hardware complication cost?

[christian-herber-nxp]

@reosdev : I would like to comment here that many of the issues you are creating here are not issues in my understanding of an issue, but rather discussion items that would be better suited on the mailing list.

An issue should be in the form of

1. Description of the current situation
2. Expected result
3. Proposed fix

[reosdev]

@christian-herber-nxp

Description of the current situation

Is provided for all opened issues

Expected result

This is good point. However, there is no formal ACLIC requirements listed elsewhere. I can guess that new spec must not make thing worse than existing architectures.

Proposed fix

You know what I'm proposing. You voted for different development direction. This is fine until you can demonstrate that voted direction can route to result. I have no idea on how to fix highlighted problems in this direction.